The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC design and materials have produced generations of ICs where each generation has smaller and more complex circuits than previous generations. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing. For these advances to be realized, similar developments in IC processing and manufacturing are needed. When a semiconductor device such as a metal-oxide-semiconductor field-effect transistor (MOSFET) is scaled down through various technology nodes, interconnects of conductive lines and associated dielectric materials that facilitate wiring between the transistors and other devices play an important role in IC performance. Although existing methods of fabricating IC devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects. For example, challenges rise in forming trenches and then cutting a trench into sub-trenches during the fabrication of IC devices.